Internship: Automatic Testbench Generation for digital design block

INTERNSHIP IN ELECTRICAL ENGINEERING – 2027 Paris La Défense (France) – 4-6 months Subject: Automatic Testbench Generation for digital design block Project Description As an intern at Melexis, you will develop a flow to automate Testbench generation for a digital design block and verify its correctness against existing designs.

Currently design is generated from a configuration sheet, the main purpose is to exploit the same sheet with minor updates to set up verification part also. More specifically, you will: Specify area of automation (environment, testbench, testcases, ...) and implement features. Verify the functionality by generating testbench on existing reference designs.

Collaborate with experienced engineers to troubleshoot and refine the design. Expected results A configurable configuration sheet to generate verification environment. A suitable verification environment for main design blocks.

Requirements

Master 2. Average knowledge of scripting and python programmation. Basic knowledge in RTL coding (Verilog and/or VHDL). Basic understanding of verification flow. Offer Joining Melexis for your internship is the opportunity to build up your know-how in a high-tech, international and dynamic company, benefit from the experience and training of our experts and enjoy the welcoming and friendly atmosphere of our Paris office team which is specialized in Digital Design and counts 20 employees. Can you make the difference? If you believe you can make the difference, please apply through www.melexis.com/careers