Design for Test (DFT) Engineer

Job Description : Role Overview: We are looking for a Design for Test (DFT) Engineer to join our growing team in Malaysia. The ideal candidate should have 4+ years of hands-on experience in implementing and verifying DFT architectures for complex ASIC/SoC Key Responsibilities: Perform scan insertion, ATPG pattern generation, and coverage analysis using industry tools.

Document DFT methodologies, test coverage metrics, and deliverables for project reviews. Spyglass Check Technical Skills Required: Strong experience with Siemens Tessent toolsets. Expertise in Scan, ATPG, Boundary Scan, and JTAG. Experience with fault simulation, coverage improvement, and DRC closure. Familiarity with test compression, hierarchical DFT, and low-power test methodologies.

Scripting knowledge in Perl / Tcl / Python is an advantage. Soft Skills : Strong analytical and debugging skills. Excellent communication and coordination abilities with cross-functional teams. Proactive, self-motivated, and detail-oriented.

Education

B.E / B.Tech / M.E / M.Tech in Electronics, Electrical, or VLSI Engineering.