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Quant Trading Developer (DEX/CEX)

Shenzhen, ChinaPosted Oct 28, 2026

Job description

Location: Shenzhen Key responsibilities Latency: Lead the work to improve our execution speed by cutting latency, jitter and bottlenecks across the tick-to-trade path (node sync, market data, network, order signing and submission), without compromising stability. Trading: Build and trade automated Hyperliquid strategies (arbitrage, liquidations, funding capture) with firm capital, and own the P&L.

Live risk: Manage positions, leverage, margin and funding in real time within risk limits. Node infrastructure: Build and run self-hosted Hyperliquid (or other DEX) nodes and execution infrastructure, keeping them stable and highly available. On-chain execution code: Build market-data handlers, internal order books and order routing for Hyperliquid and other on-chain venues.

Monitoring and controls: Track latency (order round-trip, market-data delay, fill quality) and build kill switches and position limits.

Requirements

Proven, measurable latency reduction in production while keeping live systems stable. Hands-on with latency profiling, network tuning, CPU pinning and async event loops. Trading track record: 3+ years of live quant or systematic prop trading with direct P&L responsibility, running perpetual futures strategies and managing leverage and funding in real time.

On-chain node experience: Has built and run a Hyperliquid or other DEX node, and can explain its architecture, bottlenecks and latency trade-offs in depth. On-chain coding: Strong with RPC, Web. Socket feeds, transaction signing and smart contracts. Python required; Rust, C++ or Go a strong plus. Deep understanding of perpetuals, funding, leverage, liquidations and on-chain order books.

Solid grasp of exchange microstructure (order types, order-book events, rate limits). Bachelor’s or above in Computer Science, Engineering, Finance, Mathematics or a related quantitative field. Strongly preferred Trading across DEX and CEX venues, including cross-venue arbitrage. Low-latency or HFT background (e.g. lock-free structures, ring buffers).

Description copied from Mamoru's careers page. Read the full posting before you apply.

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