24 open roles
EVT/DVT Engineer (Optics & Photonics)
$150k to $250k
Against the Palo Alto typical range
Job description
CScale is building the interconnect for gigawatt-scale AI. As AI scale-up moves toward deployments spanning thousands of accelerators and dozens of racks, the network needs to deliver high bandwidth, predictable low latency, and continuous communication. CScale is building integrated optical interconnect designed for this new scale, enabling accelerators to work together like a single, much larger computer. But at this scale, performance is only part of the challenge. Optical failures are inevitable, and the system needs to keep running. CScale is designing the interconnect for continuity. **Lasers will fail. Compute shouldn’t.**The ambition is simple:Build AI interconnect you can take for granted. CScale came out of stealth in September 2026 with $145 million in Series C funding, bringing total funding to $188 million.
We are hiring an EVT/DVT Engineer to run the optical and photonic experiments that take our photonic hardware from first silicon to design-validated product. You will build test setups, handle bare semiconductor devices, and turn measurements into clear go/no-go decisions.
This is a hands-on lab role in a fast-paced engineering build-up. We are looking for someone who likes to stand up new setups quickly, debug at the bench, and own results end to end.
What you'll do
- Plan and execute EVT and DVT test campaigns for photonic integrated circuits, lasers, and optical subassemblies: test plans, sample sizes, pass/fail criteria, and reports.
- Design, build, and align free-space and fiber-coupled optical test setups, including fiber-to-chip coupling, polarization control, and power, spectral, and loss measurements.
- Characterize semiconductor optical devices: LIV curves, spectra, SMSR, RIN, responsivity, dark current, insertion loss, extinction ratio, and wavelength tuning etc.
- Handle bare die, chips on carrier, and wafers safely: ESD control, probing, die attach, and cleanroom or clean-bench practices.
- Run environmental and reliability tests (temperature cycling, thermal sweeps, humidity) and track performance drift.
- Automate measurements and data collection and analyze results to find root causes and feed fixes back to design and process teams.
- Stand up new stations quickly as the program scales, and write procedures so others can run them.
- Work closely with photonics design, electronics, packaging, and manufacturing engineers to move hardware through build phases on schedule.
Required qualifications
- BS/MS in Optics, Physics, Electrical Engineering, or a related field with 4+ years of industry experience, or a PhD with 1+ year of industry.
- Strong hands-on experience in optics and photonics experimentation: building and aligning optical setups, fiber handling and splicing, and making repeatable measurements.
- Experience handling and testing semiconductor devices such as laser diodes, photodetectors, modulators, or PICs, including probing and ESD-safe practices.
- Working knowledge of optical test equipment: power meters, optical spectrum analyzers, tunable laser sources, SMUs, and oscilloscopes.
- Comfort in a fast-paced build-up environment: you prioritize, adapt quickly, and get hardware working at the bench.
- Clear documentation and communication of test results to cross-functional teams.
Preferred qualifications
- Knowledge of optical communications: WDM/CWDM grids, transceiver specs, link budgets, NRZ and PAM4 or coherent modulation.
- Experience with high-speed optical measurements: eye diagrams, BER testing, equalization, and electro-optic bandwidth.
- Prior work on silicon photonics or III-V platforms, including wafer-level or die-level PIC testing.
- Direct experience with EVT/DVT/PVT phase gates, design-of-experiments, and statistical analysis.
- Instrument automation with PyVISA/SCPI and building multi-channel automated test stations.
Compensation
includes a base salary of $150,000–$250,000 and equity in CScale. Final offers depend on experience, market conditions and location.
Description copied from Cspeed IO's careers page. Read the full posting before you apply.
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