Internship:Area Optimized Low Noise Comparator

MASTER THESIS/INTERNSHIP IN ELECTRICAL ENGINEERING – 2027 Bevaix (NE) - 6 months (March to August) Subject: Area Optimized Low Noise Comparator Project Description As an intern at Melexis, you will architect, design and simulate a “Area Optimized Low Noise Comparator” in CMOS technology. More specifically, you will: Conducting a literature review of the state-of-the-art.

Synthesizing new circuit ideas to address specific challenges. Evaluating design trade-offs for various circuit implementations. Presenting the simulation results and design recommendations to the engineering team.