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Technical Lead I - VLSI
Bangalore, IndiaFull-timePosted Oct 10, 2026
Job description
- Must have a solid understanding of SoC verification flows and experience with SoC verification in multiple clients.
- Should be an independent learner with experience in developing C-based tests for ARC/ARM/RISC-based SoCs.
- Must be an individual contributor capable of managing other CWs.
- Requires a good understanding of SV, UVM test benches, and experience with protocols such as APB, AXI, I2C, UART, PCIe, or DDR.
- Should be able to take the SoC verification test bench and port it for FPGA RTL verification and maintain the test bench for FPGA-RTL.
- Must possess strong debugging skills in SoC Verification.
- Candidates should have 8+ years of relevant experience.
- Candidates should have 5-8 years of relevant experience.
Description copied from UST's careers page. Read the full posting before you apply.
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